560 lines
12 KiB
C
560 lines
12 KiB
C
/*
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*********************************************************************************************************
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* IAR Development Kits
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* on the
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*
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* M451
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*
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* Filename : spi_flash.c
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* Version : V1.00
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* Programmer(s) : Qian Xianghong
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*********************************************************************************************************
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*/
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#include "includes.h"
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// 片选
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#define SFLASH_CS_LOW() LL_GPIO_ResetOutputPin(GPIOE, LL_GPIO_PIN_12)
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#define SFLASH_CS_HIGH() LL_GPIO_SetOutputPin(GPIOE, LL_GPIO_PIN_12)
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// Flash操作命令码
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#define SFLASH_OP_WREN 0x06 // Write Enable
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#define SFLASH_OP_WRDI 0x04 // Write Disable
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#define SFLASH_OP_RDSR 0x05 // Read Status Register
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#define SFLASH_OP_WRSR 0x01 // Write Status Register
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#define SFLASH_OP_READ 0x03 // Read Memory
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#define SFLASH_OP_FSTRD 0x0B // Read Memory at Higher Speed
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#define SFLASH_OP_PP 0x02 // Page Program
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#define SFLASH_OP_DPD 0xB9 // Deep Power-down Mode
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#define SFLASH_OP_RDID 0x9F // JEDEC-ID Read
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#define SFLASH_OP_PE 0x81 // Erase 256 Bytes of Memory Array
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#define SFLASH_OP_SE 0x20 // Erase 4 KBytes of Memory Array
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#define SFLASH_OP_CE 0xC7 // Erase Full Array
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#define SFLASH_OP_ULBPR 0x98 // Global Block Protection Unlock
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// Flash状态寄存器（SR)写允许(WEL)标志位
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#define SFLASH_WEL_Pos 1
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#define SFLASH_WEL_Msk (0x01 << SFLASH_WEL_Pos)
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// Flash状态寄存器（SR)Busy标志位
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#define SFLASH_BUSY_Pos 0
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#define SFLASH_BUSY_Msk (0x01 << SFLASH_BUSY_Pos)
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// 写Flash缓冲
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uint8_t SFlash_wtBuf[SFLASH_ERASE_SIZE];
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//uint8_t *SFlash_wtBuf; // 放在扩展内存
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// 读Flash全局缓冲
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uint8_t SFlash_rdBuf[SFLASH_ERASE_SIZE];
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//uint8_t *SFlash_rdBuf; // 放在扩展内存
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void SFlash_Init()
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{
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LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
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LL_SPI_InitTypeDef SPI_InitStruct = {0};
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/* Peripheral clock enable */
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LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1);
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LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOE);
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/**SPI1 GPIO Configuration
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PE13 ------> SPI1_SCK
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PE14 ------> SPI1_MISO
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PE15 ------> SPI1_MOSI
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*/
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GPIO_InitStruct.Pin = LL_GPIO_PIN_13|LL_GPIO_PIN_14|LL_GPIO_PIN_15;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
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GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_MEDIUM;
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GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
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GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
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GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
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LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
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/* USER CODE BEGIN SPI1_Init 1 */
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/* USER CODE END SPI1_Init 1 */
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/* SPI1 parameter configuration*/
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SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX;
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SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
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SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_8BIT;
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SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
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SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
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SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
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SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV2;
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SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
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SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
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SPI_InitStruct.CRCPoly = 7;
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LL_SPI_Init(SPI1, &SPI_InitStruct);
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LL_SPI_SetStandard(SPI1, LL_SPI_PROTOCOL_MOTOROLA);
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LL_SPI_DisableNSSPulseMgt(SPI1);
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/**/
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LL_GPIO_SetOutputPin(GPIOE, LL_GPIO_PIN_12);
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/**/
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GPIO_InitStruct.Pin = LL_GPIO_PIN_12;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
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GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
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GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
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GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
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LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
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}
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void SFlash_Open()
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{
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// 分配扩展内存
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// SFlash_rdBuf = SRAM_Alloc(SFLASH_ERASE_SIZE);
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// SFlash_wtBuf = SRAM_Alloc(SFLASH_ERASE_SIZE);
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LL_SPI_SetRxFIFOThreshold(SPI1, LL_SPI_RX_FIFO_TH_QUARTER);
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LL_SPI_Enable(SPI1);
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// 读出ID：测试通信是否正常
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SFlash_ReadID();
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}
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void SFlash_ReadID()
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{
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uint8_t i;
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uint32_t priMask;
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priMask = __get_PRIMASK();
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__disable_irq();
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SFLASH_CS_LOW();
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*(__IO uint8_t *)&SPI1->DR = SFLASH_OP_RDID;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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PRINTF("\r\nFlash ID is: ");
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for(i = 0; i < 3; i++)
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{
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*(__IO uint8_t *)&SPI1->DR = 0; // 提供CLK
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while(!(SPI1->SR & SPI_SR_RXNE));
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PRINTF("%02X ", *(__IO uint8_t *)&SPI1->DR);
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}
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PRINTF("\r\n");
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SFLASH_CS_HIGH();
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if(!priMask)
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__enable_irq();
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}
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uint8_t SFlash_UnlockBPR()
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{
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uint32_t priMask;
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priMask = __get_PRIMASK();
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__disable_irq();
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SFlash_WriteEN();
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SFLASH_CS_LOW();
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// Write Enabled
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*(__IO uint8_t *)&SPI1->DR = SFLASH_OP_ULBPR;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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SFLASH_CS_HIGH();
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if(!priMask)
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__enable_irq();
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return 1;
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}
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uint8_t SFlash_WriteEN()
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{
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uint8_t SR = 0x00;
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SFLASH_CS_LOW();
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// Write Enabled
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*(__IO uint8_t *)&SPI1->DR = SFLASH_OP_WREN;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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SFLASH_CS_HIGH();
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// Read SR
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SFLASH_CS_LOW();
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*(__IO uint8_t *)&SPI1->DR = SFLASH_OP_RDSR;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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*(__IO uint8_t *)&SPI1->DR = 0; // 提供CLK
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while(!(SPI1->SR & SPI_SR_RXNE));
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SR = *(__IO uint8_t *)&SPI1->DR;
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SFLASH_CS_HIGH();
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// Check WEL
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if(SR & SFLASH_WEL_Msk)
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return 1;
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PRINTF("\r\nWrite enable failed\r\n");
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return 0;
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}
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uint8_t SFlash_WriteDI()
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{
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uint8_t SR = 0xFF;
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SFLASH_CS_LOW();
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// Write Enabled
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*(__IO uint8_t *)&SPI1->DR = SFLASH_OP_WRDI;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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SFLASH_CS_HIGH();
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// Read SR
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SFLASH_CS_LOW();
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*(__IO uint8_t *)&SPI1->DR = SFLASH_OP_RDSR;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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*(__IO uint8_t *)&SPI1->DR = 0; // 提供CLK
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while(!(SPI1->SR & SPI_SR_RXNE));
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SR = *(__IO uint8_t *)&SPI1->DR;
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SFLASH_CS_HIGH();
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// Check WEL
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if(SR & SFLASH_WEL_Msk)
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{
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PRINTF("\r\nWrite disable failed\r\n");
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return 0;
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}
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return 1;
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}
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uint32_t SFlash_BufferRead(uint32_t Addr, uint8_t *buf, uint32_t nbytes)
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{
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uint32_t i;
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uint32_t priMask;
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priMask = __get_PRIMASK();
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__disable_irq();
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SFLASH_CS_LOW();
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// Read
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*(__IO uint8_t *)&SPI1->DR = SFLASH_OP_READ;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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// address highest byte
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*(__IO uint8_t *)&SPI1->DR = (Addr >> 16) & 0xFF;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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// address high byte
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*(__IO uint8_t *)&SPI1->DR = (Addr >> 8) & 0xFF;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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// address low byte
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*(__IO uint8_t *)&SPI1->DR = Addr & 0xFF;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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// data
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for(i = 0; i < nbytes && Addr + i < SFLASH_SIZE; i++)
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{
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*(__IO uint8_t *)&SPI1->DR = 0; // 提供CLK
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while(!(SPI1->SR & SPI_SR_RXNE));
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buf[i] = *(__IO uint8_t *)&SPI1->DR;
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}
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SFLASH_CS_HIGH();
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if(!priMask)
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__enable_irq();
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return i;
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}
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void SFlash_PageErase(uint32_t Addr)
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{
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uint8_t SR = 0xFF;
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SFLASH_CS_LOW();
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// Sector erase
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*(__IO uint8_t *)&SPI1->DR = SFLASH_OP_PE;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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// address highest byte
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*(__IO uint8_t *)&SPI1->DR = (Addr >> 16) & 0xFF;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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// address high byte
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*(__IO uint8_t *)&SPI1->DR = (Addr >> 8) & 0xFF;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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// address low byte
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*(__IO uint8_t *)&SPI1->DR = Addr & 0xFF;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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SFLASH_CS_HIGH();
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// Read SR
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do
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{
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SFLASH_CS_LOW();
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*(__IO uint8_t *)&SPI1->DR = SFLASH_OP_RDSR;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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*(__IO uint8_t *)&SPI1->DR = 0; // 提供CLK
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while(!(SPI1->SR & SPI_SR_RXNE));
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SR = *(__IO uint8_t *)&SPI1->DR;
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SFLASH_CS_HIGH();
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} while(SR & SFLASH_BUSY_Msk);
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}
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void SFlash_SectorErase(uint32_t Addr)
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{
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uint8_t SR = 0xFF;
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SFLASH_CS_LOW();
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// Sector erase
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*(__IO uint8_t *)&SPI1->DR = SFLASH_OP_SE;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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// address highest byte
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*(__IO uint8_t *)&SPI1->DR = (Addr >> 16) & 0xFF;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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// address high byte
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*(__IO uint8_t *)&SPI1->DR = (Addr >> 8) & 0xFF;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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// address low byte
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*(__IO uint8_t *)&SPI1->DR = Addr & 0xFF;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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SFLASH_CS_HIGH();
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// Read SR
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do
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{
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SFLASH_CS_LOW();
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*(__IO uint8_t *)&SPI1->DR = SFLASH_OP_RDSR;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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*(__IO uint8_t *)&SPI1->DR = 0; // 提供CLK
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while(!(SPI1->SR & SPI_SR_RXNE));
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SR = *(__IO uint8_t *)&SPI1->DR;
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SFLASH_CS_HIGH();
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} while(SR & SFLASH_BUSY_Msk);
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}
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void SFlash_ChipErase()
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{
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uint8_t SR = 0xFF;
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SFLASH_CS_LOW();
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// Chip erase
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*(__IO uint8_t *)&SPI1->DR = SFLASH_OP_CE;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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SFLASH_CS_HIGH();
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// Read SR
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do
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{
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SFLASH_CS_LOW();
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*(__IO uint8_t *)&SPI1->DR = SFLASH_OP_RDSR;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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*(__IO uint8_t *)&SPI1->DR = 0; // 提供CLK
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while(!(SPI1->SR & SPI_SR_RXNE));
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SR = *(__IO uint8_t *)&SPI1->DR;
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SFLASH_CS_HIGH();
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} while(SR & SFLASH_BUSY_Msk);
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}
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uint16_t SFlash_PageProgram(uint32_t Addr, uint8_t *buf)
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{
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uint8_t SR = 0xFF;
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uint16_t i;
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SFLASH_CS_LOW();
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// Page grogram
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*(__IO uint8_t *)&SPI1->DR = SFLASH_OP_PP;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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// address highest byte
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*(__IO uint8_t *)&SPI1->DR = (Addr >> 16) & 0xFF;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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// address high byte
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*(__IO uint8_t *)&SPI1->DR = (Addr >> 8) & 0xFF;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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// address low byte
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*(__IO uint8_t *)&SPI1->DR = Addr & 0xFF;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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// data
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for(i = 0; i < SFLASH_PAGE_SIZE && Addr + i < SFLASH_SIZE; i++)
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{
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*(__IO uint8_t *)&SPI1->DR = buf[i];
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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}
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SFLASH_CS_HIGH();
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// Read SR
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do
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{
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SFLASH_CS_LOW();
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*(__IO uint8_t *)&SPI1->DR = SFLASH_OP_RDSR;
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while(!(SPI1->SR & SPI_SR_RXNE));
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*(__IO uint8_t *)&SPI1->DR;
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*(__IO uint8_t *)&SPI1->DR = 0; // 提供CLK
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while(!(SPI1->SR & SPI_SR_RXNE));
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SR = *(__IO uint8_t *)&SPI1->DR;
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SFLASH_CS_HIGH();
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} while(SR & SFLASH_BUSY_Msk);
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return i;
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}
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uint16_t SFlash_SectorProgram(uint32_t Addr, uint8_t *buf)
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{
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uint16_t i = 0;
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uint16_t j;
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uint32_t priMask;
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for(j = 0; j < SFLASH_ERASE_SIZE; j += SFLASH_PAGE_SIZE)
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{
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priMask = __get_PRIMASK();
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__disable_irq();
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SFlash_WriteEN();
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i += SFlash_PageProgram(Addr + j, buf + j);
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if(!priMask)
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__enable_irq();
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}
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return i;
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}
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uint32_t SFlash_BufferWrite(uint32_t Addr, uint8_t *buf, uint32_t nbytes)
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{
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uint32_t count, offset;
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uint32_t priMask;
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while(nbytes > 0)
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{
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// 计算页内偏移（只有第一页有可能非0）
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offset = Addr % SFLASH_ERASE_SIZE;
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// 计算一页内写入字节数
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count = SFLASH_ERASE_SIZE - offset;
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if(count > nbytes)
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count = nbytes;
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// 页对齐
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Addr -= offset;
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// 读本页内数据
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SFlash_BufferRead(Addr, SFlash_wtBuf, SFLASH_ERASE_SIZE);
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// 如果数据一致，不用写
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||
if(memcmp(SFlash_wtBuf + offset, buf, count) != 0)
|
||
{
|
||
// 擦除本页
|
||
priMask = __get_PRIMASK();
|
||
__disable_irq();
|
||
SFlash_WriteEN();
|
||
SFlash_PageErase(Addr);
|
||
if(!priMask)
|
||
__enable_irq();
|
||
|
||
// 修改数据
|
||
memcpy(SFlash_wtBuf + offset, buf, count);
|
||
|
||
// 写入本页数据
|
||
priMask = __get_PRIMASK();
|
||
__disable_irq();
|
||
SFlash_WriteEN();
|
||
SFlash_PageProgram(Addr, SFlash_wtBuf);
|
||
if(!priMask)
|
||
__enable_irq();
|
||
}
|
||
|
||
// 计算下一页
|
||
Addr += SFLASH_ERASE_SIZE;
|
||
buf += count;
|
||
nbytes -= count;
|
||
}
|
||
|
||
return TRUE;
|
||
}
|
||
|
||
uint32_t SFlash_BufferVerify(uint32_t Addr, uint8_t *buf, uint32_t nbytes)
|
||
{
|
||
uint32_t data_len;
|
||
|
||
while(nbytes > 0)
|
||
{
|
||
if(nbytes > SFLASH_ERASE_SIZE)
|
||
data_len = SFLASH_ERASE_SIZE;
|
||
else
|
||
data_len = nbytes;
|
||
|
||
SFlash_BufferRead(Addr, SFlash_wtBuf, data_len);
|
||
if(memcmp(SFlash_wtBuf, buf, data_len) != 0)
|
||
return FALSE;
|
||
|
||
// 计算下一页
|
||
Addr += data_len;
|
||
buf += data_len;
|
||
nbytes -= data_len;
|
||
}
|
||
|
||
return TRUE;
|
||
}
|
||
|
||
uint16_t do_sflash_crc(unsigned long base_addr, long len)
|
||
{
|
||
unsigned short crc = 0;
|
||
unsigned short data_len;
|
||
|
||
while(len > 0)
|
||
{
|
||
if(len > SFLASH_ERASE_SIZE)
|
||
data_len = SFLASH_ERASE_SIZE;
|
||
else
|
||
data_len = len;
|
||
|
||
SFlash_BufferRead(base_addr, SFlash_rdBuf, data_len);
|
||
crc = do_crc_16(crc, SFlash_rdBuf, data_len);
|
||
|
||
base_addr += data_len;
|
||
len -= data_len;
|
||
}
|
||
|
||
return crc;
|
||
}
|