503 lines
11 KiB
C
503 lines
11 KiB
C
/*
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*********************************************************************************************************
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* IAR Development Kits
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* on the
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*
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* M451
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*
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* Filename : spi_flash.c
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* Version : V1.00
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* Programmer(s) : Qian Xianghong
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*********************************************************************************************************
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*/
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#include "includes.h"
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// Flash操作命令码
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#define SFLASH_OP_WREN 0x06 // Write Enable
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#define SFLASH_OP_WRDI 0x04 // Write Disable
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#define SFLASH_OP_RDSR 0x05 // Read Status Register
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#define SFLASH_OP_WRSR 0x01 // Write Status Register
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#define SFLASH_OP_READ 0x03 // Read Memory
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#define SFLASH_OP_FSTRD 0x0B // Read Memory at Higher Speed
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#define SFLASH_OP_PP 0x02 // Page Program
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#define SFLASH_OP_DPD 0xB9 // Deep Power-down Mode
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#define SFLASH_OP_RDID 0x9F // JEDEC-ID Read
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#define SFLASH_OP_PE 0x81 // Erase 256 Bytes of Memory Array
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#define SFLASH_OP_SE 0x20 // Erase 4 KBytes of Memory Array
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#define SFLASH_OP_CE 0xC7 // Erase Full Array
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#define SFLASH_OP_ULBPR 0x98 // Global Block Protection Unlock
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// Flash状态寄存器（SR)写允许(WEL)标志位
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#define SFLASH_WEL_Pos 1
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#define SFLASH_WEL_Msk (0x01 << SFLASH_WEL_Pos)
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// Flash状态寄存器（SR)Busy标志位
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#define SFLASH_BUSY_Pos 0
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#define SFLASH_BUSY_Msk (0x01 << SFLASH_BUSY_Pos)
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// 写Flash缓冲
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uint8_t SFlash_wtBuf[SFLASH_ERASE_SIZE];
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//uint8_t *SFlash_wtBuf; // 放在扩展内存
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// 读Flash全局缓冲
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uint8_t SFlash_rdBuf[SFLASH_ERASE_SIZE];
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//uint8_t *SFlash_rdBuf; // 放在扩展内存
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void SFlash_Init()
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{
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SYS->PC_H_MFP &= ~(SYS_PC_H_MFP_PC8_MFP_Msk | SYS_PC_H_MFP_PC9_MFP_Msk | SYS_PC_H_MFP_PC10_MFP_Msk | SYS_PC_H_MFP_PC11_MFP_Msk);
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SYS->PC_H_MFP |= (SYS_PC_H_MFP_PC8_MFP_SPI1_SS0 | SYS_PC_H_MFP_PC9_MFP_SPI1_SCLK | SYS_PC_H_MFP_PC10_MFP_SPI1_MISO0 | SYS_PC_H_MFP_PC11_MFP_SPI1_MOSI0);
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// 允许外设时钟
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CLK_EnableModuleClock(SPI1_MODULE);
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}
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void SFlash_Open()
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{
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// 分配扩展内存
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// SFlash_rdBuf = SRAM_Alloc(SFLASH_ERASE_SIZE);
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// SFlash_wtBuf = SRAM_Alloc(SFLASH_ERASE_SIZE);
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/*---------------------------------------------------------------------------------------------------------*/
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/* Init SPI */
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/*---------------------------------------------------------------------------------------------------------*/
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/* Configure SPI1 as a master, SPI clock rate 36 MHz,
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clock idle low, 8-bit transaction, drive output on falling clock edge and latch input on rising edge. */
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SPI_Open(SPI1, SPI_MASTER, SPI_MODE_0, 8, 36000000ul);
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/* Disable the automatic hardware slave selection function. */
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SPI_DisableAutoSS(SPI1);
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SPI_SET_MSB_FIRST(SPI1);
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/* Set TX FIFO threshold, enable TX FIFO threshold interrupt and RX FIFO time-out interrupt */
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SPI_EnableFIFO(SPI1, 1, 1);
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}
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void SFlash_ReadID()
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{
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uint8_t i;
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__disable_irq();
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SPI_SET_SS0_LOW(SPI1);
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SPI_WRITE_TX0(SPI1, SFLASH_OP_RDID);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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printf("\nFlash ID is: ");
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for(i = 0; i < 3; i++)
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{
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SPI_WRITE_TX0(SPI1, 0); // 提供CLK
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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printf(" %02X", SPI_READ_RX0(SPI1));
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}
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printf("\n");
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SPI_SET_SS0_HIGH(SPI1);
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__enable_irq();
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}
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uint8_t SFlash_UnlockBPR()
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{
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__disable_irq();
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SFlash_WriteEN();
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SPI_SET_SS0_LOW(SPI1);
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// Write Enabled
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SPI_WRITE_TX0(SPI1, SFLASH_OP_ULBPR);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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SPI_SET_SS0_HIGH(SPI1);
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__enable_irq();
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return 1;
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}
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uint8_t SFlash_WriteEN()
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{
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uint8_t SR = 0x00;
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SPI_SET_SS0_LOW(SPI1);
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// Write Enabled
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SPI_WRITE_TX0(SPI1, SFLASH_OP_WREN);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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SPI_SET_SS0_HIGH(SPI1);
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// Read SR
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SPI_SET_SS0_LOW(SPI1);
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SPI_WRITE_TX0(SPI1, SFLASH_OP_RDSR);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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SPI_WRITE_TX0(SPI1, 0); // 提供CLK
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SR = SPI_READ_RX0(SPI1);
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SPI_SET_SS0_HIGH(SPI1);
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// Check WEL
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if(SR & SFLASH_WEL_Msk)
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return 1;
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printf("\nWrite enable failed\n");
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return 0;
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}
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uint8_t SFlash_WriteDI()
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{
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uint8_t SR = 0xFF;
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SPI_SET_SS0_LOW(SPI1);
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// Write Enabled
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SPI_WRITE_TX0(SPI1, SFLASH_OP_WRDI);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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SPI_SET_SS0_HIGH(SPI1);
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// Read SR
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SPI_SET_SS0_LOW(SPI1);
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SPI_WRITE_TX0(SPI1, SFLASH_OP_RDSR);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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SPI_WRITE_TX0(SPI1, 0); // 提供CLK
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SR = SPI_READ_RX0(SPI1);
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SPI_SET_SS0_HIGH(SPI1);
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// Check WEL
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if(SR & SFLASH_WEL_Msk)
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{
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printf("\nWrite disable failed\n");
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return 0;
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}
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return 1;
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}
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uint32_t SFlash_BufferRead(uint32_t Addr, uint8_t *buf, uint32_t nbytes)
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{
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uint32_t i;
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__disable_irq();
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SPI_SET_SS0_LOW(SPI1);
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// Read
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SPI_WRITE_TX0(SPI1, SFLASH_OP_READ);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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// address highest byte
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SPI_WRITE_TX0(SPI1, (Addr >> 16) & 0xFF);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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// address high byte
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SPI_WRITE_TX0(SPI1, (Addr >> 8) & 0xFF);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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// address low byte
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SPI_WRITE_TX0(SPI1, Addr & 0xFF);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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// data
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for(i = 0; i < nbytes && Addr + i < SFLASH_SIZE; i++)
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{
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SPI_WRITE_TX0(SPI1, 0); // 提供CLK
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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buf[i] = SPI_READ_RX0(SPI1);
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}
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SPI_SET_SS0_HIGH(SPI1);
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__enable_irq();
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return i;
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}
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void SFlash_PageErase(uint32_t Addr)
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{
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uint8_t SR = 0xFF;
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SPI_SET_SS0_LOW(SPI1);
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// Sector erase
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SPI_WRITE_TX0(SPI1, SFLASH_OP_PE);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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// address highest byte
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SPI_WRITE_TX0(SPI1, (Addr >> 16) & 0xFF);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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// address high byte
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SPI_WRITE_TX0(SPI1, (Addr >> 8) & 0xFF);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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// address low byte
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SPI_WRITE_TX0(SPI1, Addr & 0xFF);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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SPI_SET_SS0_HIGH(SPI1);
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// Read SR
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do
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{
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SPI_SET_SS0_LOW(SPI1);
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SPI_WRITE_TX0(SPI1, SFLASH_OP_RDSR);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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SPI_WRITE_TX0(SPI1, 0); // 提供CLK
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SR = SPI_READ_RX0(SPI1);
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SPI_SET_SS0_HIGH(SPI1);
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} while(SR & SFLASH_BUSY_Msk);
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}
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void SFlash_SectorErase(uint32_t Addr)
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{
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uint8_t SR = 0xFF;
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SPI_SET_SS0_LOW(SPI1);
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// Sector erase
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SPI_WRITE_TX0(SPI1, SFLASH_OP_SE);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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// address highest byte
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SPI_WRITE_TX0(SPI1, (Addr >> 16) & 0xFF);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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// address high byte
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SPI_WRITE_TX0(SPI1, (Addr >> 8) & 0xFF);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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// address low byte
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SPI_WRITE_TX0(SPI1, Addr & 0xFF);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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SPI_SET_SS0_HIGH(SPI1);
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// Read SR
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do
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{
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SPI_SET_SS0_LOW(SPI1);
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SPI_WRITE_TX0(SPI1, SFLASH_OP_RDSR);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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SPI_WRITE_TX0(SPI1, 0); // 提供CLK
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SR = SPI_READ_RX0(SPI1);
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SPI_SET_SS0_HIGH(SPI1);
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} while(SR & SFLASH_BUSY_Msk);
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}
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void SFlash_ChipErase()
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{
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uint8_t SR = 0xFF;
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SPI_SET_SS0_LOW(SPI1);
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// Chip erase
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SPI_WRITE_TX0(SPI1, SFLASH_OP_CE);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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SPI_SET_SS0_HIGH(SPI1);
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// Read SR
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do
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{
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SPI_SET_SS0_LOW(SPI1);
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SPI_WRITE_TX0(SPI1, SFLASH_OP_RDSR);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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SPI_WRITE_TX0(SPI1, 0); // 提供CLK
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SR = SPI_READ_RX0(SPI1);
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SPI_SET_SS0_HIGH(SPI1);
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} while(SR & SFLASH_BUSY_Msk);
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}
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uint16_t SFlash_PageProgram(uint32_t Addr, uint8_t *buf)
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{
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uint8_t SR = 0xFF;
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uint16_t i;
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SPI_SET_SS0_LOW(SPI1);
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// Page grogram
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SPI_WRITE_TX0(SPI1, SFLASH_OP_PP);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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// address highest byte
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SPI_WRITE_TX0(SPI1, (Addr >> 16) & 0xFF);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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// address high byte
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SPI_WRITE_TX0(SPI1, (Addr >> 8) & 0xFF);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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// address low byte
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SPI_WRITE_TX0(SPI1, Addr & 0xFF);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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// data
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for(i = 0; i < SFLASH_PAGE_SIZE && Addr + i < SFLASH_SIZE; i++)
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{
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SPI_WRITE_TX0(SPI1, buf[i]);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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}
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SPI_SET_SS0_HIGH(SPI1);
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// Read SR
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do
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{
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SPI_SET_SS0_LOW(SPI1);
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SPI_WRITE_TX0(SPI1, SFLASH_OP_RDSR);
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SPI_READ_RX0(SPI1);
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SPI_WRITE_TX0(SPI1, 0); // 提供CLK
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while(SPI_GET_RX_FIFO_EMPTY_FLAG(SPI1));
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SR = SPI_READ_RX0(SPI1);
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SPI_SET_SS0_HIGH(SPI1);
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} while(SR & SFLASH_BUSY_Msk);
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return i;
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}
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uint16_t SFlash_SectorProgram(uint32_t Addr, uint8_t *buf)
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{
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uint16_t i = 0;
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uint16_t j;
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for(j = 0; j < SFLASH_ERASE_SIZE; j += SFLASH_PAGE_SIZE)
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{
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__disable_irq();
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SFlash_WriteEN();
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i += SFlash_PageProgram(Addr + j, buf + j);
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__enable_irq();
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}
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return i;
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}
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uint32_t SFlash_BufferWrite(uint32_t Addr, uint8_t *buf, uint32_t nbytes)
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{
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uint32_t count, offset;
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while(nbytes > 0)
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{
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// 计算页内偏移（只有第一页有可能非0）
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offset = Addr % SFLASH_ERASE_SIZE;
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// 计算一页内写入字节数
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count = SFLASH_ERASE_SIZE - offset;
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if(count > nbytes)
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count = nbytes;
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// 页对齐
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Addr -= offset;
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// 读本页内数据
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SFlash_BufferRead(Addr, SFlash_wtBuf, SFLASH_ERASE_SIZE);
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// 如果数据一致，不用写
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if(memcmp(SFlash_wtBuf + offset, buf, count) != 0)
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{
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// 擦除本页
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__disable_irq();
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SFlash_WriteEN();
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SFlash_PageErase(Addr);
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__enable_irq();
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// 修改数据
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memcpy(SFlash_wtBuf + offset, buf, count);
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// 写入本页数据
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__disable_irq();
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SFlash_WriteEN();
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SFlash_PageProgram(Addr, SFlash_wtBuf);
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__enable_irq();
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}
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// 计算下一页
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Addr += SFLASH_ERASE_SIZE;
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buf += count;
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nbytes -= count;
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}
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return TRUE;
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}
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uint32_t SFlash_BufferVerify(uint32_t Addr, uint8_t *buf, uint32_t nbytes)
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{
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uint32_t data_len;
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while(nbytes > 0)
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{
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if(nbytes > SFLASH_ERASE_SIZE)
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data_len = SFLASH_ERASE_SIZE;
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else
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data_len = nbytes;
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SFlash_BufferRead(Addr, SFlash_wtBuf, data_len);
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if(memcmp(SFlash_wtBuf, buf, data_len) != 0)
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return FALSE;
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// 计算下一页
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Addr += data_len;
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buf += data_len;
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nbytes -= data_len;
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}
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return TRUE;
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}
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uint16_t do_sflash_crc(unsigned long base_addr, long len)
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{
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unsigned short crc = 0;
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unsigned short data_len;
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while(len > 0)
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{
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if(len > SFLASH_ERASE_SIZE)
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data_len = SFLASH_ERASE_SIZE;
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else
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data_len = len;
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SFlash_BufferRead(base_addr, SFlash_rdBuf, data_len);
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crc = do_crc_16(crc, SFlash_rdBuf, data_len);
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base_addr += data_len;
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len -= data_len;
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}
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return crc;
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}
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