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STM32_WGY/User/SX127X_Driver.c

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首次提交WGY程序
2025-04-03 15:29:20 +08:00
/**
******************************************************************************
* <EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD> SX127X_Driver.c
* <EFBFBD><EFBFBD><EFBFBD><EFBFBD> <EFBFBD><EFBFBD> LSD RF Team
* <EFBFBD>汾 <EFBFBD><EFBFBD> V1.0.0
* ʱ<EFBFBD><EFBFBD> <EFBFBD><EFBFBD> 15-Aug-2018
* <EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>ΪSX127Xģ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㣬<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SX127Xģ<EFBFBD><EFBFBD><EFBFBD>Ĺ<EFBFBD><EFBFBD><EFBFBD>ģʽ<EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD>FIFO<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*<EFBFBD>书<EFBFBD>ʡ<EFBFBD>Ƶ<EFBFBD>ʵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><EFBFBD>Լ<EFBFBD>һЩ<EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĺ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD>ͻ<EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><EFBFBD>SX127Xģ<EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD>ֲ<EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SX127X_HAL.c<EFBFBD>и<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܶ<EFBFBD><EFBFBD><EFBFBD>
*ʵ<EFBFBD><EFBFBD><EFBFBD>Һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȶ<EFBFBD>û<EFBFBD>иĶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>DZ<EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Բ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֱ<EFBFBD><EFBFBD>ʹ<EFBFBD>ã<EFBFBD><EFBFBD>ͻ<EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD>ò<EFBFBD>ֱ<EFBFBD>ӵ<EFBFBD>
*<EFBFBD>ñ<EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϳ<EFBFBD><EFBFBD><EFBFBD>ʵ<EFBFBD>ָ<EFBFBD><EFBFBD>ֲ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*******************************************************************************/
#include "SX127X_Driver.h"
#include "stm32l4xx_hal.h"
/*
ע<EFBFBD>⣬<EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD>ĺ<EFBFBD><EFBFBD><EFBFBD>ʵ<EFBFBD><EFBFBD><EFBFBD>˴<EFBFBD>RF<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>MCU<EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD>
*/
extern SPI_HandleTypeDef SPI2_InitStruct;
float G_BandWidthKHz = 500.0;//<2F><><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD>Symbol<6F><6C><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
float G_TsXms = 1.024;//1.024ms
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X <EFBFBD><EFBFBD><EFBFBD>ò<EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
S_LoRaConfig G_LoRaConfig = {
470000000,
BW500KHZ,
SF08,
CR_4_5,
15,
true,
true,
true,
64,
};
S_LoRaPara G_LoRaPara;
//-------------------------SX127X <20>Ĵ<EFBFBD><C4B4><EFBFBD>------------------------//
//<2F>ò<EFBFBD><C3B2>ֺ<EFBFBD><D6BA><EFBFBD>ΪMCU<43><55>SX127Xģ<58><C4A3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>д<EFBFBD><D0B4>FIFO<46>Ķ<EFBFBD>д
//--------------------------------------------------------------//
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺RF <EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַд1<EFBFBD>ֽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>uint8_t addr,<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ uint8_t data<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void SX127X_Write( uint8_t addr, uint8_t data )
{
SX127X_WriteBuffer( addr, &data, 1 );
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺RF <EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>1<EFBFBD>ֽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>uint8_t addr,<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ uint8_t *data<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ洢<EFBFBD><EFBFBD>ַ
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void SX127X_Read( uint8_t addr, uint8_t *data )
{
SX127X_ReadBuffer( addr, data, 1 );
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X <EFBFBD><EFBFBD>FIFOд<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>uint8_t *buffer,<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD> uint8_t size<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void SX127X_WriteFifo( uint8_t *buffer, uint8_t size )
{
SX127X_WriteBuffer( 0, buffer, size );
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X <EFBFBD><EFBFBD>FIFO<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>uint8_t *buffer,<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD> uint8_t size<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD>uint8_t *buffer <EFBFBD>洢<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void SX127X_ReadFifo( uint8_t *buffer, uint8_t size )
{
SX127X_ReadBuffer( 0, buffer, size );
}
//-------------------------SX127X <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>-----------------------//
//<2F>ò<EFBFBD><C3B2>ֺ<EFBFBD><D6BA><EFBFBD>Ϊ<EFBFBD><CEAA>SX127Xģ<58>鸴λ<E9B8B4><CEBB><EFBFBD><EFBFBD><EFBFBD>书<EFBFBD>ʡ<EFBFBD><CAA1><EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD>ʵȲ<CAB5><C8B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD>
//<2F><>SX127X<37><58><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD>á<EFBFBD><C3A1><EFBFBD><EFBFBD>ݰ<EFBFBD><DDB0><EFBFBD>д<EFBFBD><D0B4>
//--------------------------------------------------------------//
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X <EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void SX127X_Reset(void)
{
SX127X_RESET_OUTPUT(GPIO_PIN_RESET);
osDelay(2);
SX127X_RESET_OUTPUT(GPIO_PIN_SET);
osDelay(15);
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X IO<EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void SX127X_InitIo(void)
{
SX127X_DIO0_INPUT();
SX127X_DIO1_INPUT();
SX127X_DIO2_INPUT();
SX127X_SPIGPIO_Init();
SX127X_RESET_OUTPUT(GPIO_PIN_SET);
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>LSD4RF-2F717N10<31>Լ<EFBFBD>LSD4RF-2F717N01<30><31>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD>
SX127X_TXE_OUTPUT(GPIO_PIN_RESET);
SX127X_RXE_OUTPUT(GPIO_PIN_RESET);
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X TX/RX<EFBFBD><EFBFBD>PA<EFBFBD>л<EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>bool txEnable <EFBFBD>л<EFBFBD><EFBFBD>߼<EFBFBD><EFBFBD><EFBFBD><EFBFBD>棺<EFBFBD><EFBFBD>ΪTX<EFBFBD><EFBFBD><EFBFBD>٣<EFBFBD><EFBFBD><EFBFBD>ΪRX ΪӲ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PA<EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO<EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ:<EFBFBD><EFBFBD>
*/
void SX127XWriteRxTx( bool txEnable )
{
if( txEnable != 0 ) //<2F><><EFBFBD><EFBFBD>Ϊ<EFBFBD>棬ΪTX
{
SX127X_RXE_OUTPUT(GPIO_PIN_RESET);
SX127X_TXE_OUTPUT(GPIO_PIN_SET);
}
else //Ϊ<>٣<EFBFBD>ΪRX
{
SX127X_RXE_OUTPUT(GPIO_PIN_SET);
SX127X_TXE_OUTPUT(GPIO_PIN_RESET);
}
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺DIO0<EFBFBD>жϿ<EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void DIO0_EnableInterrupt(void)
{
SX127X_DIO0_INTENABLE();
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺DIO0<EFBFBD>жϹر<EFBFBD>ʹ<EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void DIO0_DisableInterrupt(void)
{
SX127X_DIO0_INTDISABLE();
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺DIO0<EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<EFBFBD><EFBFBD>ȡ
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD>State<EFBFBD><EFBFBD>ʾDIO0<EFBFBD><EFBFBD>ȡ<EFBFBD>ĵ<EFBFBD>ƽ<EFBFBD><EFBFBD><EFBFBD>ߵ<EFBFBD>ƽ"1",<EFBFBD>͵<EFBFBD>ƽ"0"
*/
GPIO_PinState DIO0_GetState(void)
{
GPIO_PinState State;
State = SX127X_DIO0_GetState();
return State;
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X <EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD>ʼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD>true or false
*/
bool LoRaConfig_Check(void)
{
if((G_LoRaConfig.LoRa_Freq < 401000000) || (G_LoRaConfig.LoRa_Freq > 930000000))
return false;
G_LoRaConfig.BandWidth = (t_BandWidth)(G_LoRaConfig.BandWidth & 0xF0);
if(G_LoRaConfig.BandWidth > BW500KHZ)
return false;
//<2F><><EFBFBD><EFBFBD>BandWidth
switch(G_LoRaConfig.BandWidth) {
case BW500KHZ:
G_BandWidthKHz = 500.0;
break;
case BW250KHZ:
G_BandWidthKHz = 250.0;
break;
case BW125KHZ:
G_BandWidthKHz = 125.0;
break;
case BW62_50KHZ:
G_BandWidthKHz = 62.5;
break;
case BW41_66KHZ:
G_BandWidthKHz = 41.66;
break;
case BW31_25KHZ:
G_BandWidthKHz = 31.25;
break;
case BW20_83KHZ:
G_BandWidthKHz = 20.83;
break;
case BW15_62KHZ:
G_BandWidthKHz = 15.62;
break;
case BW10_41KHZ:
G_BandWidthKHz = 10.41;
break;
case BW7_81KHZ:
G_BandWidthKHz = 7.81;
break;
}
G_LoRaConfig.SpreadingFactor = (t_SpreadingFactor)(G_LoRaConfig.SpreadingFactor & 0xF0);
if((G_LoRaConfig.SpreadingFactor > SF12) || (G_LoRaConfig.SpreadingFactor < SF06))
return false;
//<2F><><EFBFBD><EFBFBD>LoRa<52><61>Ԫ<EFBFBD><D4AA><EFBFBD>ڣ<EFBFBD><DAA3><EFBFBD>λms
G_TsXms = (2 << ((G_LoRaConfig.SpreadingFactor >> 4) - 1)) / G_BandWidthKHz;
G_LoRaConfig.CodingRate = (t_CodingRate)(G_LoRaConfig.CodingRate & 0x0E);
if((G_LoRaConfig.CodingRate > CR_4_8) || (G_LoRaConfig.CodingRate < CR_4_5))
return false;
if(G_LoRaConfig.PowerCfig > 15)
return false;
if(G_LoRaConfig.PayloadLength > 127)
return false;
return true;
}
/**
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:SX127X<EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD>tSX127xError <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ö<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
tSX127xError SX127X_Lora_init(uint32_t freq)
{
if(false == LoRaConfig_Check()) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
{
return PARAMETER_INVALID;
}
SX127X_InitIo();
SX127X_Reset();
SX127X_SPI_Init();
SX127X_Write( REG_LR_OPMODE, RFLR_OPMODE_SLEEP );
SX127X_Write( REG_LR_OPMODE, 0x80 | RFLR_OPMODE_SLEEP );
SX127X_Write( REG_LR_OPMODE, 0x80 | RFLR_OPMODE_STANDBY );
//SPI <20><>֤
uint8_t test = 0;
SX127X_Write( REG_LR_HOPPERIOD, 0x91 ); //ѡһ<D1A1><D2BB><EFBFBD>ò<EFBFBD><C3B2><EFBFBD><EFBFBD>ļĴ<C4BC><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֤
SX127X_Read( REG_LR_HOPPERIOD, &test);
if(test != 0x91)
return SPI_READCHECK_WRONG;
SX127X_Write( REG_LR_DIOMAPPING2, RFLR_DIOMAPPING2_DIO4_01);
SX127X_Write(REG_LR_LNA, 0x20);
SX127X_FreqSet(freq);
SX127X_PoutSet();
SX127X_Write( REG_LR_PARAMP, RFLR_PARAMP_1000_US);
// <20><>PA Ramp<6D><70>ʱ<EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD>LDO<44><4F><EFBFBD>ܿ<EFBFBD><DCBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD>PA Rampʱ<70><CAB1>
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Rampʱ<70><CAB1><EFBFBD><EFBFBD><EFBFBD>̳<EFBFBD><CCB3><EFBFBD><EFBFBD><EFBFBD>LDO<44><4F><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>TX<54><58><EFBFBD><EFBFBD>ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>RF<52>źŲ<C5BA><C5B2><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD>
SX127X_Write( REG_LR_OCP, 0x20 | RFLR_OCP_TRIM_240_MA); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ر<EFBFBD><D8B1><EFBFBD> Over Current Protection
SX127X_Write( REG_LR_PAYLOADLENGTH, G_LoRaConfig.PayloadLength);
//ע<>⣬<EFBFBD><E2A3AC>ͷģʽ<C4A3><CABD>Implicit Header<65><72>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD>涨<EFBFBD><E6B6A8><EFBFBD>շ<EFBFBD>˫<EFBFBD><CBAB><EFBFBD><EFBFBD>PL
//BW<42><57>CR<43><52>Header<65><72><EFBFBD>ޣ<EFBFBD><DEA3><EFBFBD>ʼ<EFBFBD><CABC>
SX127X_Write( REG_LR_MODEMCONFIG1, \
(((uint8_t)G_LoRaConfig.BandWidth) | ((uint8_t)G_LoRaConfig.CodingRate)) | (\
(true == G_LoRaConfig.ExplicitHeaderOn) ? 0x00 : 0x01));
//SF<53><46>CRC<52><43>ʼ<EFBFBD><CABC>
SX127X_Write( REG_LR_MODEMCONFIG2, \
((uint8_t)G_LoRaConfig.SpreadingFactor) | (\
(true == G_LoRaConfig.CRCON) ? 0x04 : 0x00));
if(SF06 == G_LoRaConfig.SpreadingFactor) { //<2F><><EFBFBD><EFBFBD>SF = 6<><36><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD>ú<EFBFBD><C3BA><EFBFBD><EFBFBD><EFBFBD>
uint8_t temp = 0;
SX127X_Read( 0x31, &temp);
SX127X_Write( 0x31, (temp & 0xF8) | 0x05);
SX127X_Write( 0x37, 0x0C);
}
//BWΪ500KHzʱ<7A><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȵ<EFBFBD>һ<EFBFBD><D2BB><EFBFBD>Ż<EFBFBD>
if(G_LoRaConfig.BandWidth==BW500KHZ)
{
if(G_LoRaConfig.LoRa_Freq <=525000000)
{
SX127X_Write(REG_LR_HighWOptimize1, 0x02);
SX127X_Write(REG_LR_HighWOptimize2, 0x7F);
}
else if(G_LoRaConfig.LoRa_Freq >=862000000)
{
SX127X_Write(REG_LR_HighWOptimize1, 0x02);
SX127X_Write(REG_LR_HighWOptimize2, 0x64);
}
}
else
{
SX127X_Write(REG_LR_HighWOptimize1, 0x03);
SX127X_Write(REG_LR_HighWOptimize2, 0x65);
}
//LORa<52>ź<EFBFBD><C5BA><EFBFBD><EFBFBD>ٽ<EFBFBD><D9BD>մ<EFBFBD><D5B4><EFBFBD>(errata)<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD><C6AB>(<28><><EFBFBD><EFBFBD>ƫ<EFBFBD><C6AB>1MHz<48><7A>2MHz...)<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>»<EFBFBD><C2BB><EFBFBD><EFBFBD>໥ͨ<E0BBA5><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
if(G_LoRaConfig.BandWidth==BW500KHZ)
{
uint8_t temp = 0;
SX127X_Read( 0x31, &temp);
SX127X_Write( 0x31, (temp |0x80)); //<2F><>7λ<37><CEBB><EFBFBD><EFBFBD>Ϊ0
}
else
{
uint8_t temp1 = 0;
SX127X_Read( 0x31, &temp1);
SX127X_Write(0x31, (temp1 &0x7F));//<2F><>7λ<37><CEBB><EFBFBD><EFBFBD>Ϊ0
SX127X_Write(0x2f, 0x40);
SX127X_Write(0x30, 0x00);
}
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>AutoAGCĬ<43>Ͽ<EFBFBD><CFBF><EFBFBD>
// SX127X_Write( REG_LR_MODEMCONFIG3, ((G_TsXms > 16.0f) ? \
// RFLR_MODEMCONFIG3_LOWDATARATEOPTIMIZE_ON : RFLR_MODEMCONFIG3_LOWDATARATEOPTIMIZE_OFF\
// ) | RFLR_MODEMCONFIG3_AGCAUTO_ON);
SX127X_Write( REG_LR_MODEMCONFIG3,0X0C);
return NORMAL;
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺RF<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>uint8_t*data<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void SX127X_TxPacket(uint8_t*data,uint8_t len)
{
SX127X_FreqSet(498000000);
SX127X_Write( REG_LR_OPMODE, 0x80 | RFLR_OPMODE_STANDBY );
SX127X_Write( REG_LR_PREAMBLEMSB, 0);
SX127X_Write( REG_LR_PREAMBLELSB, 10);
SX127X_Write( REG_LR_PAYLOADLENGTH, len);
SX127XWriteRxTx(true);//LSD4RF-2F717N10<31>Լ<EFBFBD>LSD4RF-2F717N01ʱ<31><CAB1>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD>л<EFBFBD><D0BB><EFBFBD>
SX127X_Write( REG_LR_FIFOADDRPTR, 0x80);
SX127X_WriteBuffer(REG_LR_FIFO, data, len);
SX127X_Write(REG_LR_IRQFLAGS, 0xff);
SX127X_Write( REG_LR_IRQFLAGSMASK, ~(RFLR_IRQFLAGS_TXDONE));
SX127X_Write( REG_LR_DIOMAPPING1, RFLR_DIOMAPPING1_DIO0_01 );
SX127X_Write( REG_LR_OPMODE, 0x80 | RFLR_OPMODE_TRANSMITTER );
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺RF<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void SX127X_StartRx(void)
{
SX127X_FreqSet(499000000);
SX127X_Write( REG_LR_OPMODE, 0x80 | RFLR_OPMODE_STANDBY );
SX127X_Write( REG_LR_PREAMBLEMSB, 0);
SX127X_Write( REG_LR_PREAMBLELSB, 10);
SX127X_Write( REG_LR_PAYLOADLENGTH, G_LoRaConfig.PayloadLength);
SX127XWriteRxTx(false);//LSD4RF-2F717N10<31>Լ<EFBFBD>LSD4RF-2F717N01ʱ<31><CAB1>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD>л<EFBFBD><D0BB><EFBFBD>
SX127X_Write( REG_LR_FIFOADDRPTR, 0x00);
SX127X_Write(REG_LR_IRQFLAGS, 0xff);
SX127X_Write( REG_LR_IRQFLAGSMASK, ~(RFLR_IRQFLAGS_RXDONE));
SX127X_Write( REG_LR_DIOMAPPING1, RFLR_DIOMAPPING1_DIO0_00 );
SX127X_Write( REG_LR_OPMODE, 0x80 | RFLR_OPMODE_RECEIVER );
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺RF<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>uint8_t*cbuf<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void SX127X_RxPacket(uint8_t*cbuf)
{
unsigned char Reg_PKTRSSI, Reg_PKTSNR;
SX127X_Read( REG_LR_PKTSNRVALUE, &Reg_PKTSNR);
if((Reg_PKTSNR & 0x80) != 0) {
Reg_PKTSNR = ((~Reg_PKTSNR + 1) & 0xff) >> 2;
//SNRǰ<52><C7B0>ʾ<EFBFBD>ӡ<EFBFBD>-<2D><>
G_LoRaPara.Packet_SNR = -Reg_PKTSNR;
}
else
{
Reg_PKTSNR = (Reg_PKTSNR & 0xff) >> 2;
G_LoRaPara.Packet_SNR = Reg_PKTSNR;
}
SX127X_Read( REG_LR_PKTRSSIVALUE, &Reg_PKTRSSI);
if(G_LoRaPara.Packet_SNR < 0)
{
G_LoRaPara.Packet_RSSI = -164 + Reg_PKTRSSI - G_LoRaPara.Packet_SNR;
}
else
{
G_LoRaPara.Packet_RSSI = -164 + Reg_PKTRSSI * 16 / 15;
}
if(true == G_LoRaConfig.ExplicitHeaderOn) {
//<2F><>ͷ<EFBFBD><CDB7>ô<EFBFBD>ӼĴ<D3BC><C4B4><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>G_LoRaConfig<69><67><EFBFBD>ó<EFBFBD><C3B3>ȶ<EFBFBD>ȡFIFO
SX127X_Read(REG_LR_NBRXBYTES, &G_LoRaConfig.PayloadLength);
SX127X_Write( REG_LR_FIFOADDRPTR, 0x00);
}
SX127X_ReadFifo(cbuf, G_LoRaConfig.PayloadLength);
SX127X_Write(REG_LR_IRQFLAGS, 0xff);
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD>ǰ<EFBFBD>ŵ<EFBFBD><EFBFBD>е<EFBFBD>RSSIֵ
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD>RSSIֵ
*/
int16_t SX127X_Current_RSSI(void)
{
unsigned char Reg_RSSIValue;
///int16_t temp;
SX127X_Read( REG_LR_RSSIVALUE, &Reg_RSSIValue);
G_LoRaPara.Current_RSSI = -164 + Reg_RSSIValue;
return G_LoRaPara.Current_RSSI;
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X<EFBFBD><EFBFBD><EFBFBD><EFBFBD>LORA˯<EFBFBD><EFBFBD>ģʽ
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void SX127X_SleepMode(void)
{
SX127X_Write( REG_LR_OPMODE, 0x80 | RFLR_OPMODE_STANDBY );
SX127X_Write( REG_LR_OPMODE, 0x80 | RFLR_OPMODE_SLEEP );
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X<EFBFBD><EFBFBD><EFBFBD><EFBFBD>LORA<EFBFBD><EFBFBD>STANDBY״̬
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void SX127X_StandbyMode(void)
{
SX127X_Write( REG_LR_OPMODE, 0x80 | RFLR_OPMODE_STANDBY );
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD>tSX127xError <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ö<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
tSX127xError SX127X_FreqSet(uint32_t freq)
{
if((freq > 930000000) || (freq < 401000000))
return PARAMETER_INVALID;
uint32_t freq_reg = (uint32_t)(freq / FREQ_STEP);
uint8_t test_FRFMSB = 0, test_FRFMID = 0, test_FRFLSB = 0;
SX127X_StandbyMode();
SX127X_Write( REG_LR_FRFMSB, (uint8_t)(freq_reg >> 16));
SX127X_Write( REG_LR_FRFMID, (uint8_t)(freq_reg >> 8) );
SX127X_Write( REG_LR_FRFLSB, (uint8_t)(freq_reg) );
SX127X_Read(REG_LR_FRFMSB, &test_FRFMSB);
SX127X_Read(REG_LR_FRFMID, &test_FRFMID);
SX127X_Read(REG_LR_FRFLSB, &test_FRFLSB);
if(test_FRFMSB != (uint8_t)(freq_reg >> 16))
return SPI_READCHECK_WRONG;
if(test_FRFMID != (uint8_t)(freq_reg >> 8))
return SPI_READCHECK_WRONG;
if(test_FRFLSB != (uint8_t)(freq_reg))
return SPI_READCHECK_WRONG;
return NORMAL;
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X<EFBFBD><EFBFBD><EFBFBD>ù<EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD>tSX127xError <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ö<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
tSX127xError SX127X_PoutSet(void)
{
if(G_LoRaConfig.PowerCfig > 15)
return PARAMETER_INVALID;
SX127X_StandbyMode();
SX127X_Write( REG_LR_PACONFIG, 0xf0 | G_LoRaConfig.PowerCfig);
uint8_t test = 0;
SX127X_Read(REG_LR_PACONFIG, &test);
if((0xf0 | G_LoRaConfig.PowerCfig) != test)
return SPI_READCHECK_WRONG;
if(true == G_LoRaConfig.MaxPowerOn)
SX127X_Write( REG_LR_PADAC, 0x80 | RFLR_PADAC_20DBM_ON );
else
SX127X_Write( REG_LR_PADAC, 0x80 | RFLR_PADAC_20DBM_OFF );
return NORMAL;
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X CAD<EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void SX127X_CADinit(void)
{
SX127X_Write( REG_LR_OPMODE, 0x80 | RFLR_OPMODE_STANDBY );
SX127X_Write( REG_LR_PREAMBLEMSB, 0xf0);
SX127X_Write( REG_LR_PREAMBLELSB, 0xff);
SX127X_Write( REG_LR_IRQFLAGSMASK, \
~(RFLR_IRQFLAGS_CADDONE | RFLR_IRQFLAGS_CADDETECTED));
SX127X_Write( REG_LR_DIOMAPPING1, RFLR_DIOMAPPING1_DIO0_10);
SX127XWriteRxTx(false); //set RF switch to RX path
SX127X_Write(REG_LR_IRQFLAGS, 0xff);
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X <EFBFBD><EFBFBD><EFBFBD><EFBFBD>CAD<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ŵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>ԼΪ(2^SF+32)/BW
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void SX127X_CAD_Sample(void)
{
SX127XWriteRxTx(false); //set RF switch to RX path
SX127X_Write( REG_LR_OPMODE, 0x80 | RFLR_OPMODE_STANDBY );
SX127X_Write( REG_LR_OPMODE, 0x80 | RFLR_OPMODE_CAD );
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺WOR<EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void SX127X_WORInit(void)
{
SX127X_CADinit(); //CAD<41><44><EFBFBD>ܳ<EFBFBD>ʼ<EFBFBD><CABC>
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺ִ<EFBFBD><EFBFBD>WOR<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>uint8_t cclen 0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˯<EFBFBD>ߡ<EFBFBD>1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>CAD<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void SX127X_WOR_Execute(uint8_t cclen)
{
switch(cclen)
{
case 0: //<2F><><EFBFBD><EFBFBD>˯<EFBFBD><CBAF>
{
SX127X_Write(REG_LR_IRQFLAGS, 0xff); //clear flags
SX127X_SleepMode(); //<2F><><EFBFBD><EFBFBD>˯<EFBFBD><CBAF>ģʽ
}
break;
case 1: //<2F><><EFBFBD><EFBFBD>CAD<41><44><EFBFBD><EFBFBD>ģʽ
{
SX127X_CAD_Sample(); //<2F><><EFBFBD><EFBFBD>CADһ<44><D2BB>
}
break;
default:
break;
}
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺WOR<EFBFBD><EFBFBD>RX
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void SX127X_WOR_Exit(void)
{
SX127X_Write( REG_LR_OPMODE, 0x80 | RFLR_OPMODE_STANDBY );
SX127X_Write( REG_LR_PREAMBLEMSB, 0xf0);
SX127X_Write( REG_LR_PREAMBLELSB, 0xff);
SX127X_Write( REG_LR_PAYLOADLENGTH, G_LoRaConfig.PayloadLength);
SX127X_Write( REG_LR_IRQFLAGSMASK, ~(RFLR_IRQFLAGS_RXDONE));
SX127X_Write( REG_LR_DIOMAPPING1, RFLR_DIOMAPPING1_DIO0_00 );
SX127XWriteRxTx(false);
SX127X_Write( REG_LR_FIFOADDRPTR, 0x00);
SX127X_Write(REG_LR_IRQFLAGS, 0xff);
SX127X_Write( REG_LR_OPMODE, 0x80 | RFLR_OPMODE_RECEIVER );
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X<EFBFBD><EFBFBD><EFBFBD>ͻ<EFBFBD><EFBFBD>Ѱ<EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>uint8_t*data<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD>,ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void SX127X_Awake(uint8_t*cbuf, uint16_t Preamble_Length)
{
SX127X_Write( REG_LR_OPMODE, 0x80 | RFLR_OPMODE_STANDBY );
SX127X_Write( REG_LR_PAYLOADLENGTH, G_LoRaConfig.PayloadLength);
SX127XWriteRxTx(true);
SX127X_Write( REG_LR_FIFOADDRPTR, 0x80);
SX127X_WriteBuffer(REG_LR_FIFO, cbuf, G_LoRaConfig.PayloadLength);
SX127X_Write(REG_LR_IRQFLAGS, 0xff);
SX127X_Write( REG_LR_IRQFLAGSMASK, ~(RFLR_IRQFLAGS_TXDONE));
SX127X_Write( REG_LR_DIOMAPPING1, RFLR_DIOMAPPING1_DIO0_01 );
SX127X_Write( REG_LR_PREAMBLEMSB, (uint8_t)(Preamble_Length >> 8)); //set preamble length
SX127X_Write( REG_LR_PREAMBLELSB, (uint8_t)Preamble_Length); //set preamble length
SX127X_Write( REG_LR_OPMODE, 0x80 | RFLR_OPMODE_TRANSMITTER );
}
/***********************************************FSK********************************************************************/
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X FSK<EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
unsigned char SX127x_Fsk_init(void)
{
SX127X_InitIo(); // PAIO<49>ڳ<EFBFBD>ʼ<EFBFBD><CABC>
SX127X_Reset(); //<2F><>λRF
SX127X_SPI_Init(); //SPI<50><49>ʼ<EFBFBD><CABC>
LSD_RF_SleepMode_FSK();
LSD_RF_StandbyMode_FSK();
LSD_RF_Config();
// to test SPI
uint8_t test = 0;
SX127X_Write(REG_FSK_SYNCVALUE8, 0x55);
SX127X_Read(REG_FSK_SYNCVALUE8, &test);
if(test != 0x55)
{
return SPI_READCHECK_WRONG;// something wrong with SPI
}
SX127X_Write(REG_FSK_SYNCVALUE8, 0xD3);
SX127X_Read(REG_FSK_SYNCVALUE8, &test);
if(test != 0xD3)
{
return SPI_READCHECK_WRONG;// something wrong with SPI
}
return NORMAL;
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X дFSK<EFBFBD><EFBFBD><EFBFBD>ñ<EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void LSD_RF_Config(void)
{
_SX12XX_REG const *p;
unsigned char i;
p = LSD_RFregConfig;
for(i = sizeof(LSD_RFregConfig) / 2; i > 0; i--)
{
SX127X_Write(p->addr, p->val);
p++;
}
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X <EFBFBD><EFBFBD><EFBFBD><EFBFBD>FSK<EFBFBD><EFBFBD>standbyģʽ
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void LSD_RF_StandbyMode_FSK(void)
{
unsigned char cData;
unsigned int nTimes = 65535;
SX127X_Write(REG_FSK_OPMODE, 0x08 | RFFSK_OPMODE_STANDBY );
do
{
SX127X_Read(REG_FSK_OPMODE, &cData);
nTimes--;
}
while(((cData & 0x07) != RFFSK_OPMODE_STANDBY) && nTimes);
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X <EFBFBD><EFBFBD><EFBFBD><EFBFBD>FSK<EFBFBD><EFBFBD>Sleepģʽ
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void LSD_RF_SleepMode_FSK(void)
{
unsigned char cData;
unsigned int nTimes = 65535;
SX127X_Write(REG_FSK_OPMODE, 0x08 | RFFSK_OPMODE_SLEEP );
do
{
SX127X_Read(REG_FSK_OPMODE, &cData);
nTimes--;
}
while(((cData & 0x07) != RFFSK_OPMODE_SLEEP) && nTimes);
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X FSKģʽ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>FIFO
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void LSD_RF_ClearFIFO(void)
{
SX127X_Write(REG_FSK_IRQFLAGS2, 0x10);
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X FSK<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>txBuffer<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ洢<EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD><EFBFBD>׵<EFBFBD>ַ<EFBFBD><EFBFBD>size<EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void LSD_RF_SendPacket_FSK(uint8_t *txBuffer, uint8_t size)
{
LSD_RF_StandbyMode_FSK();
SX127X_Write(REG_FSK_DIOMAPPING1, RFFSK_DIOMAPPING1_DIO0_00);
SX127XWriteRxTx(true);
LSD_RF_ClearFIFO();
SX127X_Write(REG_FSK_FIFO, size);
for(unsigned int i = 0; i < size; i++)
{
SX127X_Write(REG_FSK_FIFO, txBuffer[i]);
}
SX127X_Write(REG_FSK_OPMODE, 0x08 | RFFSK_OPMODE_TRANSMITTER );
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X <EFBFBD><EFBFBD><EFBFBD><EFBFBD>FSK<EFBFBD><EFBFBD>RXģʽ
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void LSD_RF_RXmode_FSK(void)
{
LSD_RF_StandbyMode_FSK();
SX127X_Write(REG_FSK_DIOMAPPING1, RFFSK_DIOMAPPING1_DIO0_00);
LSD_RF_ClearFIFO();
SX127XWriteRxTx(false);
SX127X_Write(REG_FSK_OPMODE, 0x08 | RFFSK_OPMODE_RECEIVER);
}
/**
* @<EFBFBD><EFBFBD><EFBFBD>飺SX127X FSK<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>cRxBuf<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ洢<EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD><EFBFBD>׵<EFBFBD>ַ<EFBFBD><EFBFBD>c<EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*/
void LSD_RF_RxPacket_FSK(uint8_t *cRxBuf, uint8_t *cLength)
{
uint8_t i;
uint8_t test = 0;
LSD_RF_StandbyMode_FSK();
SX127X_Read(REG_FSK_FIFO, &test);
*cLength = test;
for(i = 0; i < *cLength; i++)
SX127X_Read(REG_FSK_FIFO, &cRxBuf[i]);
LSD_RF_ClearFIFO();
}
/***********************************************FSK End********************************************************************/
void Lora_spi_di_deinit(void)
{
// __HAL_RCC_SPI2_FORCE_RESET();
// __HAL_RCC_SPI2_RELEASE_RESET();
// HAL_GPIO_DeInit(GPIOB, (GPIO_PIN_13 | GPIO_PIN_14| GPIO_PIN_15));
// HAL_SPI_DeInit(&SPI2_InitStruct);
//SX127X_NSS_OUTPUT(GPIO_PIN_RESET);
HAL_SPI_DeInit(&SPI2_InitStruct);
__HAL_RCC_SPI2_CLK_DISABLE();
}