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ShipCentralControl/RF-AP/Wuhabin/RF-AP-TX.c

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增加RF-AP程序
2025-04-07 09:18:02 +08:00
// Haybin_Wu
// Shenitech-RD
// 2016.5
// Built with IAR Embedded Workbench v6.2
//******************************************************************************
#include <msp430FR2433.h>
#include <stdint.h>
#include "FR2433-RFSX.h"
#include "RF_SX1276.h"
uint32_t t=0;
void FRAM_Write (uint16_t FRAM_START,uint8_t *(Array),uint8_t Array_Long);
void FRAM_Read (uint16_t FRAM_START,uint8_t *(Array),uint8_t Array_Long);
void Set_DT(void);
void Refresh_Date(void);
void UART0_Tx(uint8_t data);
#define FRAM_Date_START 0x1800 //Date <20>洢<EFBFBD><E6B4A2>ʼ<EFBFBD><CABC>ַ
#define FRAM_ID_START 0x1806 //ID <20>洢<EFBFBD><E6B4A2>ʼ<EFBFBD><CABC>ַ
#define RTC_Data 1920 //<2F><><EFBFBD><EFBFBD>RTC<54><43>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> RTC_Data/32=<3D><>s
uint8_t Rx_Buf[64];
uint8_t Rx_Length=0;
uint8_t Rx_Flog=0;
uint8_t Rx_Data=0;
uint8_t Date_Time[6]=
{
30,//0<><30>
16,//1<><31>
10,//2ʱ
22,//3<><33>
05,//4<><34>
16,//5<><35>
};
uint8_t Device_ID[4]={0xA6,0x52,0x40,0x01,};//<2F>豸ID
//UART<52><54><EFBFBD><EFBFBD>
void UART0_Tx(uint8_t data)
{
UCA0TXBUF = data;
while((UCTXIFG&UCA0IFG)==0);
UCA0IFG&=~UCTXIFG;
}
void Refresh_Date(void)
{
FRAM_Read(FRAM_Date_START,Date_Time,6);
Date_Time[0]=RTCCNT/32;
}
////////////////////////////////////////////////////////////////////////////////
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
////////////////////////////////////////////////////////////////////////////////
int main(void)
{
WDTCTL = WDTPW | WDTHOLD; // Stop WDT
// Port Configuration all un-used pins to output low
P1DIR = 0xFF; P2DIR = 0xFF; P3DIR = 0xFF;
P1OUT = 0x00; P2OUT = 0x00; P3OUT = 0x00;
PM5CTL0 &= ~LOCKLPM5;//<2F><><EFBFBD><EFBFBD><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>
// Configure DCO Clock
//<2F>ⲿʱ<E2B2BF><CAB1>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD>
P2SEL0 |= BIT0 | BIT1; // set XT1 pin as second function
do
{
CSCTL7 &= ~(XT1OFFG | DCOFFG); // Clear XT1 and DCO fault flag
SFRIFG1 &= ~OFIFG;
} while (SFRIFG1 & OFIFG); // Test oscillator fault flag
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD>ڽ<EFBFBD><DABD>͹<EFBFBD><CDB9><EFBFBD>
__bis_SR_register(SCG0); // disable FLL
CSCTL3 |= SELREF__XT1CLK; // <20>ⲿ 32768hz reference source
CSCTL0 = 0; // clear DCO and MOD registers
CSCTL1 &= ~(DCORSEL_7); // Clear DCO frequency select bits first
CSCTL1 |= DCORSEL_3; //DCO=8Mhz
CSCTL2 = FLLD_0 + 243; // DCODIV = 8MHz
__delay_cycles(3);
__bic_SR_register(SCG0); // enable FLL
while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)); // Poll until FLL is locked
CSCTL4 = SELREF__XT1CLK + SELMS__DCOCLKDIV;// set XT1CLK(32768Hz) as ACLK source & MCLK/SMCLK=DCO
//Timer0_A3 setup
//TA0CCTL0 = CCIE; // TACCR0 interrupt enabled
//TA0CCR0 = 32768;
//TA0CTL = TASSEL_1 | MC_1; // ACLK, continuous mode
// Initialize RTC
RTCMOD = RTC_Data;
RTCCTL = (RTCSS__XT1CLK + RTCPS__1024 + RTCIE);//+ RTCSR// Source = 32kHz crystal, divided by 1024
if(RTCCNT>RTC_Data){RTCCTL |= RTCSR;WDTCTL=0;}
Refresh_Date();//<2F><>λ<EFBFBD><CEBB>ˢ<EFBFBD><CBA2>ʱ<EFBFBD><CAB1>
//FRCTL0 = FRCTLPW | NWAITS_1;//FRRAM
FRAM_Read(FRAM_ID_START,Device_ID,4);//ˢ<><CBA2><EFBFBD>豸ID
// Configure UART pins
P1SEL0 |= BIT4 | BIT5; // set 2-UART pin as second function
// Configure UART
UCA0CTLW0 |=(UCSSEL__SMCLK+UCSWRST);//UCPEN+UCPAR+
// Baud Rate calculation
UCA0BR0 = 52; // 8000000/8/9600//<2F><>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>16 UCOS16λҪ<CEBB><D2AA>λ
UCA0BR1 = 0x00; // Fractional portion = 0.083
//UCA0MCTLW = 0x11;//΢<><CEA2>Baud Rate
UCA0MCTLW = 0x4900 | UCOS16 | UCBRF_1;//΢<><CEA2>Baud Rate
UCA0CTLW0 &= ~UCSWRST; // Initialize eUSCI
UCA0IE |= UCRXIE; // Enable USCI_A0 RX interrupt
_EINT();
//<2F><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD>Ի<EFBFBD>
uint8_t RF_error_flag=0;
for(uint8_t i=0;i<5;i++)//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>3<EFBFBD><33>
{
if(SX127x_init(Init_LoRa_0_8K)==NORMAL) break; //<2F><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ʧ<EFBFBD>ܸ<EFBFBD>λ
else RF_error_flag=1;
}
if(RF_error_flag==1) //<2F><><EFBFBD>߳<EFBFBD>ʼ<EFBFBD><CABC>ʧ<EFBFBD>ܴ<EFBFBD><DCB4><EFBFBD>
{
//P3OUT ^= 0xC0;
LPM4;
}
LSD_RF_SleepMode();//<2F><><EFBFBD><EFBFBD>˯<EFBFBD><CBAF>1.2uA
__bis_SR_register(LPM3_bits | GIE); // Enter LPM3
//uint32_t i=0;
__no_operation(); // For debugger
while(1)
{
//P3OUT ^= 0xC0;
//for(uint8_t i=0;i<Rx_Data;i++);
do
{
Rx_Flog=0;
DelayMs(450); //<2F><>ʱ<EFBFBD><CAB1><EFBFBD≯<EFBFBD><CCB8><EFBFBD><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD>ϵ
}
while(Rx_Flog==1);
LSD_RF_SendPacket(Rx_Buf,Rx_Data); //<2F><><EFBFBD>͸<EFBFBD><CDB8>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݲ<EFBFBD><DDB2><EFBFBD>
DelayMs(800);//<2F><>ʱ<EFBFBD><CAB1><EFBFBD≯<EFBFBD><CCB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3>̺<EFBFBD><CCBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD>ϵ
Rx_Data=0;
//P3OUT ^= 0xC0; // Toggle P3.6,7 (LED) every 1s
//UART0_Tx(0xE5);
//if(SX127x_init(Init_LoRa_0_8K)==NORMAL);
LSD_RF_SleepMode();
__bis_SR_register(LPM3_bits | GIE); // Enter LPM3
}
}
// Port 2 interrupt service routine
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=PORT2_VECTOR
__interrupt void Port_2(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(PORT2_VECTOR))) Port_2 (void)
#else
#error Compiler not supported!
#endif
{
P2IFG=0; // Clear P1.3 IFG
//__bic_SR_register_on_exit(LPM3_bits); // Exit LPM3
}
/*
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=USCI_A0_VECTOR
__interrupt void USCI_A0_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(USCI_A0_VECTOR))) USCI_A0_ISR (void)
#else
#error Compiler not supported!
#endif
{
if(Rx_Length >= 100)
{
Rx_Length = 0;
}
Rx_Buf[Rx_Length]=UCA0RXBUF;
Rx_Length++;
Rx_Flog=1;
}
// SPI-B0 interrupt service routine
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=USCI_B0_VECTOR
__interrupt void USCI_B0_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(USCI_B0_VECTOR))) USCI_B0_ISR (void)
#else
#error Compiler not supported!
#endif
{
while (!(UCB0IFG&UCTXIFG)); // USCI_A0 TX buffer ready?
UCB0TXBUF = UCB0RXBUF; // Echo received data
}
*/
// Timer0 A0 interrupt service routine
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = TIMER0_A0_VECTOR
__interrupt void Timer0_A0_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(TIMER0_A0_VECTOR))) Timer0_A0_ISR (void)
#else
#error Compiler not supported!
#endif
{
t++;
if(t>5)
{
t=0;//WDTCTL=0;
//LSD_RF_RxVariPacket(Rxbuffer,Rxbuffer_size); //<2F><><EFBFBD>տɱ<D5BF><C9B1><EFBFBD><EFBFBD>ݰ<EFBFBD><DDB0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD>ʣ<EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD>ý<EFBFBD><C3BD>չ̶<D5B9><CCB6><EFBFBD><EFBFBD>ݰ<EFBFBD><DDB0><EFBFBD><EFBFBD><EFBFBD>
//LSD_RF_RXmode(30); //ÿ<>η<EFBFBD><CEB7><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݺ󣬽<DDBA><F3A3ACBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD>ȴ<EFBFBD>Bģ<42><C4A3>Ӧ<EFBFBD><D3A6>
}
}
// Timer1 A0 interrupt service routine
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = TIMER1_A0_VECTOR
__interrupt void Timer1_A0_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(TIMER1_A0_VECTOR))) Timer1_A0_ISR (void)
#else
#error Compiler not supported!
#endif
{
;
//if(t>5)WDTCTL=0;//P3OUT ^= 0xC0;
}
// RTC interrupt service routine //һ<><D2BB><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=RTC_VECTOR
__interrupt void RTC_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(RTC_VECTOR))) RTC_ISR (void)
#else
#error Compiler not supported!
#endif
{
if(RTCIV&0x02)
{
Date_Time[0]=60;
Set_DT();//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
FRAM_Write (FRAM_Date_START,Date_Time,6);//д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}
}
// UAR0 interrupt service routine
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector=USCI_A0_VECTOR
__interrupt void USCI_A0_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(USCI_A0_VECTOR))) USCI_A0_ISR (void)
#else
#error Compiler not supported!
#endif
{
uint8_t CS=0;
if((UCA0IV&USCI_UART_UCRXIFG)==USCI_UART_UCRXIFG)
{
Rx_Flog=1;
Rx_Buf[Rx_Data] = UCA0RXBUF;
Rx_Data++;
//UCA0IFG&=~UCRXIFG;
}
if(Rx_Data>=10)
{
for(uint8_t i=0;i<(Rx_Buf[3]+1);i++)
CS+=Rx_Buf[i+2];
if((Rx_Buf[0]==0x4D)&&(Rx_Buf[1]==0x4B)&&(Rx_Buf[Rx_Data-2]==0x55)&&(Rx_Buf[Rx_Data-1]==0x16))
{
FRAM_Read(FRAM_ID_START,Device_ID,4);//ˢ<><CBA2><EFBFBD>豸ID
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>01 <20><><EFBFBD><EFBFBD>ID//4D 4B 01 08 00 00 00 00 ID ID ID ID CS 16
if((Rx_Buf[2]==0x01)&&(Rx_Buf[4]==Device_ID[0])&&(Rx_Buf[5]==Device_ID[1])&&(Rx_Buf[6]==Device_ID[2])&&(Rx_Buf[7]==Device_ID[3]))
{
Device_ID[0]=Rx_Buf[8];Device_ID[1]=Rx_Buf[9];Device_ID[2]=Rx_Buf[10];Device_ID[3]=Rx_Buf[11];
FRAM_Write(FRAM_ID_START,Device_ID,4);
//FRAM_Read(FRAM_ID_START,Device_ID,4);//ˢ<><CBA2><EFBFBD>豸ID
UART0_Tx(0xE5);
}
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>06 <20><><EFBFBD>豸RTC//4D 4B 06 04 00 00 00 00 CS 16
if((Rx_Buf[2]==0x06)&&(Rx_Buf[4]==Device_ID[0])&&(Rx_Buf[5]==Device_ID[1])&&(Rx_Buf[6]==Device_ID[2])&&(Rx_Buf[7]==Device_ID[3]))
{
Refresh_Date();//refresh time
//Return 4D 4B 06 A0 ID ID ID ID DT DT DT DT DT DT E5 16
UART0_Tx(0x4D);UART0_Tx(0x4B);UART0_Tx(0x06);UART0_Tx(0xA0);UART0_Tx(Device_ID[0]);UART0_Tx(Device_ID[1]);UART0_Tx(Device_ID[2]);UART0_Tx(Device_ID[3]);
UART0_Tx(Date_Time[0]);UART0_Tx(Date_Time[1]);UART0_Tx(Date_Time[2]);UART0_Tx(Date_Time[3]);UART0_Tx(Date_Time[4]);UART0_Tx(Date_Time[5]);
UART0_Tx(0xE5);UART0_Tx(0x16);
}
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>07 ͬ<><CDAC>RTC//4D 4B 06 04 00 00 00 00 CS 16
if((Rx_Buf[2]==0x07)&&(Rx_Buf[4]==Device_ID[0])&&(Rx_Buf[5]==Device_ID[1])&&(Rx_Buf[6]==Device_ID[2])&&(Rx_Buf[7]==Device_ID[3]))
{
;
}
}
__bic_SR_register_on_exit(LPM3_bits); // Exit LPM3
}
}
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
void Set_DT(void)
{
if(Date_Time[0]>59)//<2F><><EFBFBD><EFBFBD>λ
{
Date_Time[1]++;
Date_Time[0]=0;
}
if(Date_Time[1]>59)//<2F>ֽ<EFBFBD>λ
{
Date_Time[2]++;
Date_Time[1]=0;
}
if(Date_Time[2]>23)//Сʱ<D0A1><CAB1>λ
{
Date_Time[3]++;
Date_Time[2]=0;
}
//<2F><>31<33><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
if((Date_Time[4]==1)||(Date_Time[4]==3)||(Date_Time[4]==5)||(Date_Time[4]==7)||(Date_Time[4]==8)||(Date_Time[4]==10)||(Date_Time[4]==12))
{
if(Date_Time[3]>31)
{
Date_Time[3]=1;
Date_Time[4]++;
}
if(Date_Time[4]>12)
{
Date_Time[4]=1;
Date_Time[5]++;
}
if(Date_Time[5]>99)Date_Time[5]=0;
}
//<2F><>30<33><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
if((Date_Time[4]==4)||(Date_Time[4]==6)||(Date_Time[4]==9)||(Date_Time[4]==11))
{
if(Date_Time[3]>30)
{
Date_Time[3]=1;
Date_Time[4]++;
}
}
//2<><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
if(Date_Time[4]==2)
{
if((Date_Time[5]%4==0&&Date_Time[5]%100!=0) ||(Date_Time[5]%400==0))//<2F><><EFBFBD><EFBFBD>
{
if(Date_Time[3]>29)
{
Date_Time[3]=1;
Date_Time[4]++;
}
}
else
{
if(Date_Time[3]>28)
{
Date_Time[3]=1;
Date_Time[4]++;
}
}
}
}
void FRAM_Write (uint16_t FRAM_START,uint8_t *(Array),uint8_t Array_Long)
{
SYSCFG0 &= ~DFWP; //Close FRAM Write Protection
//FRAM_Date_START=*0x1800;
for (uint8_t i = 0; i < Array_Long; i++)
{
*(uint8_t *)(FRAM_START+i)=Array[i];//
}
SYSCFG0 |= DFWP; //Open FRAM Write Protection
}
void FRAM_Read (uint16_t FRAM_START,uint8_t *(Array),uint8_t Array_Long)
{
for (uint8_t i = 0; i < Array_Long; i++)
{
Array[i]=*(uint8_t *)(FRAM_START+i);
}
}